A generic and reconfigurable test paradigm using Low-cost integrated Poly-Si TFTs

A generic and reconfigurable test paradigm using Low-cost integrated Poly-Si TFTs. Li, J., Ghosh, S., & Roy, K. In 2007 IEEE International Test Conference (<strong>ITC</strong>), pages 1–10, Oct, 2007.
doi bibtex

@INPROCEEDINGS{li2007itc, 
author={Jing Li and S. Ghosh and Kaushik Roy}, 
booktitle={2007 IEEE International Test Conference (<strong>ITC</strong>)}, 
title={A generic and reconfigurable test paradigm using Low-cost integrated {Poly-Si TFTs}}, 
year={2007}, 
volume={}, 
number={}, 
pages={1--10}, 
keywords={conference, VLSI,built-in self test,design for testability,elemental semiconductors,integrated circuit testing,silicon,thin film transistors,3-D technology,BIST components,Si,VLSI systems,configurable design-for-test units,generic test structure,low-cost low-temperature integrated poly-silicon TFT,process tolerant test structure,reconfigurable test structure,thin film transistors,Circuit testing,Costs,Crystallization,Design for testability,Silicon,Substrates,System testing,Temperature,Thin film transistors,Very large scale integration}, 
doi={10.1109/TEST.2007.4437622}, 
ISSN={1089-3539}, 
month={Oct},}

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