A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets

A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets. Li, Y., Li, L., Ma, Y., Chen, L., Liu, R., Wang, H., Wu, Q., Newton, M., & Chen, M. J. Electron. Test., 32(2):137–145, 2016.

Paper doi bibtex

@article{DBLP:journals/et/LiLM0LWWNC16,
  author       = {Yuanqing Li and
                  Lixiang Li and
                  Yuan Ma and
                  Li Chen and
                  Rui Liu and
                  Haibin Wang and
                  Qiong Wu and
                  Michael Newton and
                  Mo Chen},
  title        = {A 10-Transistor 65 nm {SRAM} Cell Tolerant to Single-Event Upsets},
  journal      = {J. Electron. Test.},
  volume       = {32},
  number       = {2},
  pages        = {137--145},
  year         = {2016},
  url          = {https://doi.org/10.1007/s10836-016-5573-5},
  doi          = {10.1007/S10836-016-5573-5},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/LiLM0LWWNC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

Downloads: 0

{"_id":"ywPLLHwLeSnEyKXX7","bibbaseid":"li-li-ma-chen-liu-wang-wu-newton-etal-a10transistor65nmsramcelltoleranttosingleeventupsets-2016","author_short":["Li, Y.","Li, L.","Ma, Y.","Chen, L.","Liu, R.","Wang, H.","Wu, Q.","Newton, M.","Chen, M."],"bibdata":{"bibtype":"article","type":"article","author":[{"firstnames":["Yuanqing"],"propositions":[],"lastnames":["Li"],"suffixes":[]},{"firstnames":["Lixiang"],"propositions":[],"lastnames":["Li"],"suffixes":[]},{"firstnames":["Yuan"],"propositions":[],"lastnames":["Ma"],"suffixes":[]},{"firstnames":["Li"],"propositions":[],"lastnames":["Chen"],"suffixes":[]},{"firstnames":["Rui"],"propositions":[],"lastnames":["Liu"],"suffixes":[]},{"firstnames":["Haibin"],"propositions":[],"lastnames":["Wang"],"suffixes":[]},{"firstnames":["Qiong"],"propositions":[],"lastnames":["Wu"],"suffixes":[]},{"firstnames":["Michael"],"propositions":[],"lastnames":["Newton"],"suffixes":[]},{"firstnames":["Mo"],"propositions":[],"lastnames":["Chen"],"suffixes":[]}],"title":"A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets","journal":"J. Electron. Test.","volume":"32","number":"2","pages":"137–145","year":"2016","url":"https://doi.org/10.1007/s10836-016-5573-5","doi":"10.1007/S10836-016-5573-5","timestamp":"Sun, 02 Oct 2022 01:00:00 +0200","biburl":"https://dblp.org/rec/journals/et/LiLM0LWWNC16.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@article{DBLP:journals/et/LiLM0LWWNC16,\n author = {Yuanqing Li and\n Lixiang Li and\n Yuan Ma and\n Li Chen and\n Rui Liu and\n Haibin Wang and\n Qiong Wu and\n Michael Newton and\n Mo Chen},\n title = {A 10-Transistor 65 nm {SRAM} Cell Tolerant to Single-Event Upsets},\n journal = {J. Electron. Test.},\n volume = {32},\n number = {2},\n pages = {137--145},\n year = {2016},\n url = {https://doi.org/10.1007/s10836-016-5573-5},\n doi = {10.1007/S10836-016-5573-5},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/journals/et/LiLM0LWWNC16.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Li, Y.","Li, L.","Ma, Y.","Chen, L.","Liu, R.","Wang, H.","Wu, Q.","Newton, M.","Chen, M."],"key":"DBLP:journals/et/LiLM0LWWNC16","id":"DBLP:journals/et/LiLM0LWWNC16","bibbaseid":"li-li-ma-chen-liu-wang-wu-newton-etal-a10transistor65nmsramcelltoleranttosingleeventupsets-2016","role":"author","urls":{"Paper":"https://doi.org/10.1007/s10836-016-5573-5"},"metadata":{"authorlinks":{}},"downloads":0},"bibtype":"article","biburl":"https://dblp.org/pid/31/2800.bib","dataSources":["WmviJGuSDy7CgdAjb"],"keywords":[],"search_terms":["transistor","sram","cell","tolerant","single","event","upsets","li","li","ma","chen","liu","wang","wu","newton","chen"],"title":"A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets","year":2016}