A buffer cache architecture for smartphones with hybrid DRAM/PCM memory. Lin, Y., Yang, C., Li, H., & Wang, C. M. In NVMSA, pages 1-6, 2015. IEEE.
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Paper bibtex @inproceedings{conf/nvmsa/LinYLW15,
added-at = {2015-11-10T00:00:00.000+0100},
author = {Lin, Ye-Jyun and Yang, Chia-Lin and Li, Hsiang-Pang and Wang, Cheng-Yuan Michael},
biburl = {https://www.bibsonomy.org/bibtex/27f4021e877f9e8660a88ead6905f7e07/dblp},
booktitle = {NVMSA},
crossref = {conf/nvmsa/2015},
ee = {http://dx.doi.org/10.1109/NVMSA.2015.7304363},
interhash = {77bd55cd344b451005536a32cb658707},
intrahash = {7f4021e877f9e8660a88ead6905f7e07},
isbn = {978-1-4673-6688-5},
keywords = {dblp},
pages = {1-6},
publisher = {IEEE},
timestamp = {2015-11-11T11:36:56.000+0100},
title = {A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.},
url = {http://dblp.uni-trier.de/db/conf/nvmsa/nvmsa2015.html#LinYLW15},
year = 2015
}
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{"_id":"2FDZC8hi9EdZxHHaE","bibbaseid":"lin-yang-li-wang-abuffercachearchitectureforsmartphoneswithhybriddrampcmmemory-2015","authorIDs":[],"author_short":["Lin, Y.","Yang, C.","Li, H.","Wang, C. M."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","added-at":"2015-11-10T00:00:00.000+0100","author":[{"propositions":[],"lastnames":["Lin"],"firstnames":["Ye-Jyun"],"suffixes":[]},{"propositions":[],"lastnames":["Yang"],"firstnames":["Chia-Lin"],"suffixes":[]},{"propositions":[],"lastnames":["Li"],"firstnames":["Hsiang-Pang"],"suffixes":[]},{"propositions":[],"lastnames":["Wang"],"firstnames":["Cheng-Yuan","Michael"],"suffixes":[]}],"biburl":"https://www.bibsonomy.org/bibtex/27f4021e877f9e8660a88ead6905f7e07/dblp","booktitle":"NVMSA","crossref":"conf/nvmsa/2015","ee":"http://dx.doi.org/10.1109/NVMSA.2015.7304363","interhash":"77bd55cd344b451005536a32cb658707","intrahash":"7f4021e877f9e8660a88ead6905f7e07","isbn":"978-1-4673-6688-5","keywords":"dblp","pages":"1-6","publisher":"IEEE","timestamp":"2015-11-11T11:36:56.000+0100","title":"A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.","url":"http://dblp.uni-trier.de/db/conf/nvmsa/nvmsa2015.html#LinYLW15","year":"2015","bibtex":"@inproceedings{conf/nvmsa/LinYLW15,\n added-at = {2015-11-10T00:00:00.000+0100},\n author = {Lin, Ye-Jyun and Yang, Chia-Lin and Li, Hsiang-Pang and Wang, Cheng-Yuan Michael},\n biburl = {https://www.bibsonomy.org/bibtex/27f4021e877f9e8660a88ead6905f7e07/dblp},\n booktitle = {NVMSA},\n crossref = {conf/nvmsa/2015},\n ee = {http://dx.doi.org/10.1109/NVMSA.2015.7304363},\n interhash = {77bd55cd344b451005536a32cb658707},\n intrahash = {7f4021e877f9e8660a88ead6905f7e07},\n isbn = {978-1-4673-6688-5},\n keywords = {dblp},\n pages = {1-6},\n publisher = {IEEE},\n timestamp = {2015-11-11T11:36:56.000+0100},\n title = {A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.},\n url = {http://dblp.uni-trier.de/db/conf/nvmsa/nvmsa2015.html#LinYLW15},\n year = 2015\n}\n\n","author_short":["Lin, Y.","Yang, C.","Li, H.","Wang, C. M."],"key":"conf/nvmsa/LinYLW15","id":"conf/nvmsa/LinYLW15","bibbaseid":"lin-yang-li-wang-abuffercachearchitectureforsmartphoneswithhybriddrampcmmemory-2015","role":"author","urls":{"Link":"http://dx.doi.org/10.1109/NVMSA.2015.7304363","Paper":"http://dblp.uni-trier.de/db/conf/nvmsa/nvmsa2015.html#LinYLW15"},"keyword":["dblp"],"downloads":0},"bibtype":"inproceedings","biburl":"http://www.bibsonomy.org/bib/author/yang lin?items=1000","creationDate":"2019-08-22T03:53:54.163Z","downloads":0,"keywords":["dblp"],"search_terms":["buffer","cache","architecture","smartphones","hybrid","dram","pcm","memory","lin","yang","li","wang"],"title":"A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.","year":2015,"dataSources":["a57oXwvfTysj8WtNo"]}