Design of a multi-style and multi-frequency FPGA. Manoranjan, J. V., Sajjan, S. S. T. M., Gujari, V. B., & Stevens, K. S. In 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, pages 1–6, 2016. Paper doi bibtex @inproceedings{DBLP:conf/vlsi/ManoranjanSGS16,
author = {Jotham Vaddaboina Manoranjan and
Solomon Surya Tej Mano Sajjan and
Vivek B. Gujari and
Kenneth S. Stevens},
title = {Design of a multi-style and multi-frequency {FPGA}},
booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016},
pages = {1--6},
year = {2016},
crossref = {DBLP:conf/vlsi/2016soc},
url = {https://doi.org/10.1109/VLSI-SoC.2016.7753538},
doi = {10.1109/VLSI-SoC.2016.7753538},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/bib/conf/vlsi/ManoranjanSGS16},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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