Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes. Maric, B., Abella, J., & Valero, M. IEEE Trans. VLSI Syst. (TVLSI), 22(10):2211-2215, 2014.
Paper bibtex @article{ dblp1982885,
title = {Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes},
author = {Bojan Maric and Jaume Abella and Mateo Valero},
author_short = {Maric, B. and Abella, J. and Valero, M.},
bibtype = {article},
type = {article},
year = {2014},
key = {dblp1982885},
id = {dblp1982885},
biburl = {http://www.dblp.org/rec/bibtex/journals/tvlsi/MaricAV14},
url = {http://dx.doi.org/10.1109/TVLSI.2013.2282498},
journal = {IEEE Trans. VLSI Syst. (TVLSI)},
pages = {2211-2215},
number = {10},
volume = {22},
text = {IEEE Trans. VLSI Syst. (TVLSI) 22(10):2211-2215 (2014)}
}
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