@inproceedings{DBLP:conf/indin/Martinez-Villena15,
  author    = {Jos{\'{e}} Miguel Mart{\'{\i}}nez{-}Villena and
               Jos{\'{e}} Vicente Franc{\'{e}}s{-}V{\'{\i}}llora and
               Alfredo Rosado Mu{\~{n}}oz and
               Manuel Bataller{-}Mompe{\'{a}}n and
               Juan{-}Francisco Guerrero{-}Mart{\'{\i}}nez and
               Marek Wegrzyn and
               Marian Adamski},
  title     = {Design environment for hardware generation of {SLFF} neural network
               topologies with {ELM} training capability},
  booktitle = {13th {IEEE} International Conference on Industrial Informatics, {INDIN}
               2015, Cambridge, United Kingdom, July 22-24, 2015},
  pages     = {868--875},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/INDIN.2015.7281850},
  doi       = {10.1109/INDIN.2015.7281850},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/indin/Martinez-Villena15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

{"_id":"xGiHnEos8piZwHRZo","bibbaseid":"martnezvillena-francsvllora-muoz-batallermompen-guerreromartnez-wegrzyn-adamski-designenvironmentforhardwaregenerationofslffneuralnetworktopologieswithelmtrainingcapability-2015","authorIDs":[],"author_short":["Martínez-Villena, J. M.","Francés-Víllora, J. V.","Muñoz, A. R.","Bataller-Mompeán, M.","Guerrero-Martínez, J.","Wegrzyn, M.","Adamski, M."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["José","Miguel"],"propositions":[],"lastnames":["Martínez-Villena"],"suffixes":[]},{"firstnames":["José","Vicente"],"propositions":[],"lastnames":["Francés-Víllora"],"suffixes":[]},{"firstnames":["Alfredo","Rosado"],"propositions":[],"lastnames":["Muñoz"],"suffixes":[]},{"firstnames":["Manuel"],"propositions":[],"lastnames":["Bataller-Mompeán"],"suffixes":[]},{"firstnames":["Juan-Francisco"],"propositions":[],"lastnames":["Guerrero-Martínez"],"suffixes":[]},{"firstnames":["Marek"],"propositions":[],"lastnames":["Wegrzyn"],"suffixes":[]},{"firstnames":["Marian"],"propositions":[],"lastnames":["Adamski"],"suffixes":[]}],"title":"Design environment for hardware generation of SLFF neural network topologies with ELM training capability","booktitle":"13th IEEE International Conference on Industrial Informatics, INDIN 2015, Cambridge, United Kingdom, July 22-24, 2015","pages":"868–875","publisher":"IEEE","year":"2015","url":"https://doi.org/10.1109/INDIN.2015.7281850","doi":"10.1109/INDIN.2015.7281850","timestamp":"Wed, 16 Oct 2019 14:14:52 +0200","biburl":"https://dblp.org/rec/conf/indin/Martinez-Villena15.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/indin/Martinez-Villena15,\n author = {Jos{\\'{e}} Miguel Mart{\\'{\\i}}nez{-}Villena and\n Jos{\\'{e}} Vicente Franc{\\'{e}}s{-}V{\\'{\\i}}llora and\n Alfredo Rosado Mu{\\~{n}}oz and\n Manuel Bataller{-}Mompe{\\'{a}}n and\n Juan{-}Francisco Guerrero{-}Mart{\\'{\\i}}nez and\n Marek Wegrzyn and\n Marian Adamski},\n title = {Design environment for hardware generation of {SLFF} neural network\n topologies with {ELM} training capability},\n booktitle = {13th {IEEE} International Conference on Industrial Informatics, {INDIN}\n 2015, Cambridge, United Kingdom, July 22-24, 2015},\n pages = {868--875},\n publisher = {{IEEE}},\n year = {2015},\n url = {https://doi.org/10.1109/INDIN.2015.7281850},\n doi = {10.1109/INDIN.2015.7281850},\n timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},\n biburl = {https://dblp.org/rec/conf/indin/Martinez-Villena15.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Martínez-Villena, J. M.","Francés-Víllora, J. V.","Muñoz, A. R.","Bataller-Mompeán, M.","Guerrero-Martínez, J.","Wegrzyn, M.","Adamski, M."],"key":"DBLP:conf/indin/Martinez-Villena15","id":"DBLP:conf/indin/Martinez-Villena15","bibbaseid":"martnezvillena-francsvllora-muoz-batallermompen-guerreromartnez-wegrzyn-adamski-designenvironmentforhardwaregenerationofslffneuralnetworktopologieswithelmtrainingcapability-2015","role":"author","urls":{"Paper":"https://doi.org/10.1109/INDIN.2015.7281850"},"downloads":0},"bibtype":"inproceedings","biburl":"https://dblp.org/search/publ/api?format=bib&h=1000&q=author:José_R._Álvarez:|author:Margarita_Bachiller:|author:Margarita_Bachiller_Mayoral:|author:Enrique_J._Carmona:|author:José_Manuel_Cuadra_Troncoso:|author:José_Luis_Fernández-Vindel:|author:Carolina_Mañoso:|author:Rafael_Martínez-Tomás:|author:Félix_de_la_Paz:|author:Angel_Pérez_de_Madrid:|author:Mariano_Rincón:|author:Miguel_Romero_0003:|author:Miguel_Romero_Hortelano:","creationDate":"2020-09-24T15:30:17.399Z","downloads":0,"keywords":[],"search_terms":["design","environment","hardware","generation","slff","neural","network","topologies","elm","training","capability","martínez-villena","francés-víllora","muñoz","bataller-mompeán","guerrero-martínez","wegrzyn","adamski"],"title":"Design environment for hardware generation of SLFF neural network topologies with ELM training capability","year":2015,"dataSources":["jY3Qd7SvX7QP2zSXh"]}