Risks of Isolated Gate Transistor Disturbance due to its Implementation. Merienne, F., Roudet, J., & Schanen, J. In Torino (Italy), September, 1995.
bibtex   
@inproceedings{merienne_frederic_risks_1995,
	address = {Torino (Italy)},
	title = {Risks of {Isolated} {Gate} {Transistor} {Disturbance} due to its {Implementation}},
	author = {Merienne, Frederic and Roudet, James and Schanen, Jean-Luc},
	month = sep,
	year = {1995}
}

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