Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. Miryala, S.; Tenace, V.; Calimera, A.; Macii, E.; Poncino, M.; Amarù, L. G.; Micheli, G. D.; and Gaillardon, P. In Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20 - 22, 2015, pages 39–44, 2015.
Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/glvlsi/MiryalaTCMPAMG15,
  author    = {Sandeep Miryala and
               Valerio Tenace and
               Andrea Calimera and
               Enrico Macii and
               Massimo Poncino and
               Luca Gaetano Amar{\`{u}} and
               Giovanni De Micheli and
               Pierre{-}Emmanuel Gaillardon},
  title     = {Exploiting the Expressive Power of Graphene Reconfigurable Gates via
               Post-Synthesis Optimization},
  booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
               {GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
  pages     = {39--44},
  year      = {2015},
  crossref  = {DBLP:conf/glvlsi/2015},
  url       = {https://doi.org/10.1145/2742060.2742098},
  doi       = {10.1145/2742060.2742098},
  timestamp = {Tue, 23 Jul 2019 15:03:09 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/glvlsi/MiryalaTCMPAMG15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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