@article{journals/iet-cds/MossaHE16,
  added-at = {2016-02-11T00:00:00.000+0100},
  author = {Mossa, Siraj Fulum and Hasan, Syed Rafay and Elkeelany, Omar Sayed Ahmed},
  biburl = {http://www.bibsonomy.org/bibtex/2bac787f9c0d482f42444540acf9306fc/dblp},
  ee = {http://dx.doi.org/10.1049/iet-cds.2015.0065},
  interhash = {9aa2b207b2c908aa01825f9aedae7983},
  intrahash = {bac787f9c0d482f42444540acf9306fc},
  journal = {IET Circuits, Devices & Systems},
  keywords = {dblp},
  number = 1,
  pages = {44-53},
  timestamp = {2016-02-12T11:36:43.000+0100},
  title = {Grouped through silicon vias for lower Ldi/dt drop in three-dimensional integrated circuit.},
  url = {http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds10.html#MossaHE16},
  volume = 10,
  year = 2016
}

{"_id":"d7eBtknaEFohbMxb8","bibbaseid":"mossa-hasan-elkeelany-groupedthroughsiliconviasforlowerldidtdropinthreedimensionalintegratedcircuit-2016","downloads":0,"creationDate":"2016-02-17T10:30:03.995Z","title":"Grouped through silicon vias for lower Ldi/dt drop in three-dimensional integrated circuit.","author_short":["Mossa, S. F.","Hasan, S. R.","Elkeelany, O. S. A."],"year":2016,"bibtype":"article","biburl":"http://www.bibsonomy.org/bib/author/\"ahmed shamsul arefin\"?items=1000","bibdata":{"bibtype":"article","type":"article","added-at":"2016-02-11T00:00:00.000+0100","author":[{"propositions":[],"lastnames":["Mossa"],"firstnames":["Siraj","Fulum"],"suffixes":[]},{"propositions":[],"lastnames":["Hasan"],"firstnames":["Syed","Rafay"],"suffixes":[]},{"propositions":[],"lastnames":["Elkeelany"],"firstnames":["Omar","Sayed","Ahmed"],"suffixes":[]}],"biburl":"http://www.bibsonomy.org/bibtex/2bac787f9c0d482f42444540acf9306fc/dblp","ee":"http://dx.doi.org/10.1049/iet-cds.2015.0065","interhash":"9aa2b207b2c908aa01825f9aedae7983","intrahash":"bac787f9c0d482f42444540acf9306fc","journal":"IET Circuits, Devices & Systems","keywords":"dblp","number":"1","pages":"44-53","timestamp":"2016-02-12T11:36:43.000+0100","title":"Grouped through silicon vias for lower Ldi/dt drop in three-dimensional integrated circuit.","url":"http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds10.html#MossaHE16","volume":"10","year":"2016","bibtex":"@article{journals/iet-cds/MossaHE16,\n added-at = {2016-02-11T00:00:00.000+0100},\n author = {Mossa, Siraj Fulum and Hasan, Syed Rafay and Elkeelany, Omar Sayed Ahmed},\n biburl = {http://www.bibsonomy.org/bibtex/2bac787f9c0d482f42444540acf9306fc/dblp},\n ee = {http://dx.doi.org/10.1049/iet-cds.2015.0065},\n interhash = {9aa2b207b2c908aa01825f9aedae7983},\n intrahash = {bac787f9c0d482f42444540acf9306fc},\n journal = {IET Circuits, Devices & Systems},\n keywords = {dblp},\n number = 1,\n pages = {44-53},\n timestamp = {2016-02-12T11:36:43.000+0100},\n title = {Grouped through silicon vias for lower Ldi/dt drop in three-dimensional integrated circuit.},\n url = {http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds10.html#MossaHE16},\n volume = 10,\n year = 2016\n}\n\n","author_short":["Mossa, S. F.","Hasan, S. R.","Elkeelany, O. S. A."],"key":"journals/iet-cds/MossaHE16","id":"journals/iet-cds/MossaHE16","bibbaseid":"mossa-hasan-elkeelany-groupedthroughsiliconviasforlowerldidtdropinthreedimensionalintegratedcircuit-2016","role":"author","urls":{"Link":"http://dx.doi.org/10.1049/iet-cds.2015.0065","Paper":"http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds10.html#MossaHE16"},"keyword":["dblp"],"downloads":0},"search_terms":["grouped","through","silicon","vias","lower","ldi","drop","three","dimensional","integrated","circuit","mossa","hasan","elkeelany"],"keywords":["dblp"],"authorIDs":[],"dataSources":["XA98H7MrAfSrDfP6g"]}