Technology mapping of timed circuits. Myers, C. J., Beerel, P. A., & Meng, T. H. Y. In Second Working Conference on Asynchronous Design Methodologies, May 30-31, 1995, London, England, UK, pages 138, 1995.
Technology mapping of timed circuits [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/async/MyersBM95,
  author    = {Chris J. Myers and
               Peter A. Beerel and
               Teresa H. Y. Meng},
  title     = {Technology mapping of timed circuits},
  booktitle = {Second Working Conference on Asynchronous Design Methodologies, May
               30-31, 1995, London, England, {UK}},
  pages     = {138},
  year      = {1995},
  crossref  = {DBLP:conf/async/1995},
  url       = {https://doi.org/10.1109/WCADM.1995.514651},
  doi       = {10.1109/WCADM.1995.514651},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/async/MyersBM95},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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