Technology mapping of timed circuits. Myers, C. J., Beerel, P. A., & Meng, T. H. Y. In Second Working Conference on Asynchronous Design Methodologies, May 30-31, 1995, London, England, UK, pages 138, 1995. Paper doi bibtex @inproceedings{DBLP:conf/async/MyersBM95,
author = {Chris J. Myers and
Peter A. Beerel and
Teresa H. Y. Meng},
title = {Technology mapping of timed circuits},
booktitle = {Second Working Conference on Asynchronous Design Methodologies, May
30-31, 1995, London, England, {UK}},
pages = {138},
year = {1995},
crossref = {DBLP:conf/async/1995},
url = {https://doi.org/10.1109/WCADM.1995.514651},
doi = {10.1109/WCADM.1995.514651},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/bib/conf/async/MyersBM95},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
Downloads: 0
{"_id":"yaR7SLTQxX8HELPvv","bibbaseid":"myers-beerel-meng-technologymappingoftimedcircuits-1995","authorIDs":[],"author_short":["Myers, C. J.","Beerel, P. A.","Meng, T. H. Y."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Chris","J."],"propositions":[],"lastnames":["Myers"],"suffixes":[]},{"firstnames":["Peter","A."],"propositions":[],"lastnames":["Beerel"],"suffixes":[]},{"firstnames":["Teresa","H.","Y."],"propositions":[],"lastnames":["Meng"],"suffixes":[]}],"title":"Technology mapping of timed circuits","booktitle":"Second Working Conference on Asynchronous Design Methodologies, May 30-31, 1995, London, England, UK","pages":"138","year":"1995","crossref":"DBLP:conf/async/1995","url":"https://doi.org/10.1109/WCADM.1995.514651","doi":"10.1109/WCADM.1995.514651","timestamp":"Wed, 16 Oct 2019 14:14:56 +0200","biburl":"https://dblp.org/rec/bib/conf/async/MyersBM95","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/async/MyersBM95,\n author = {Chris J. Myers and\n Peter A. Beerel and\n Teresa H. Y. Meng},\n title = {Technology mapping of timed circuits},\n booktitle = {Second Working Conference on Asynchronous Design Methodologies, May\n 30-31, 1995, London, England, {UK}},\n pages = {138},\n year = {1995},\n crossref = {DBLP:conf/async/1995},\n url = {https://doi.org/10.1109/WCADM.1995.514651},\n doi = {10.1109/WCADM.1995.514651},\n timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},\n biburl = {https://dblp.org/rec/bib/conf/async/MyersBM95},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Myers, C. J.","Beerel, P. A.","Meng, T. H. Y."],"key":"DBLP:conf/async/MyersBM95","id":"DBLP:conf/async/MyersBM95","bibbaseid":"myers-beerel-meng-technologymappingoftimedcircuits-1995","role":"author","urls":{"Paper":"https://doi.org/10.1109/WCADM.1995.514651"},"downloads":0,"html":""},"bibtype":"inproceedings","biburl":"https://ycunxi.github.io/utah-csl/bibtex/all.bib","creationDate":"2019-11-14T21:37:03.913Z","downloads":0,"keywords":[],"search_terms":["technology","mapping","timed","circuits","myers","beerel","meng"],"title":"Technology mapping of timed circuits","year":1995,"dataSources":["L6BLFSB28hKk5Nt67"]}