Automatic synthesis of gate-level timed circuits with choice. Myers, C. J., Rokicki, T., & Meng, T. H. Y. In 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pages 42–58, 1995. Paper doi bibtex @inproceedings{DBLP:conf/arvlsi/MyersRM95,
author = {Chris J. Myers and
Tomas Rokicki and
Teresa H. Y. Meng},
title = {Automatic synthesis of gate-level timed circuits with choice},
booktitle = {16th Conference on Advanced Research in {VLSI} {(ARVLSI} '95), March
27-29, 1995, Chapel Hill, North Carolina, {USA}},
pages = {42--58},
year = {1995},
crossref = {DBLP:conf/arvlsi/1995},
url = {https://doi.org/10.1109/ARVLSI.1995.515610},
doi = {10.1109/ARVLSI.1995.515610},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/bib/conf/arvlsi/MyersRM95},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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