A high-level DRAM timing, power and area exploration tool. Naji, O., Weis, C., Jung, M., Wehn, N., & Hansson, A. In 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2015, Samos, Greece, July 19-23, 2015, pages 149--156, 2015.
A high-level DRAM timing, power and area exploration tool [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/samos/NajiW0WH15,
  author    = {Omar Naji and
               Christian Weis and
               Matthias Jung and
               Norbert Wehn and
               Andreas Hansson},
  title     = {A high-level {DRAM} timing, power and area exploration tool},
  booktitle = {2015 International Conference on Embedded Computer Systems: Architectures,
               Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
               2015},
  pages     = {149--156},
  year      = {2015},
  crossref  = {DBLP:conf/samos/2015},
  url       = {http://dx.doi.org/10.1109/SAMOS.2015.7363670},
  doi       = {10.1109/SAMOS.2015.7363670},
  timestamp = {Thu, 07 Jan 2016 18:44:55 +0100},
  biburl    = {http://dblp.dagstuhl.de/rec/bib/conf/samos/NajiW0WH15},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}

Downloads: 0