Low-Cost On-Chip Clock Jitter Measurement Scheme. Omaña, M., Rossi, D., Giaffreda, D., Metra, C., Mak, T. M., Rahman, A., & Tam, S. IEEE Trans. VLSI Syst., 23(3):435-443, 2015.
Low-Cost On-Chip Clock Jitter Measurement Scheme. [link]Link  Low-Cost On-Chip Clock Jitter Measurement Scheme. [link]Paper  bibtex   
@article{journals/tvlsi/OmanaRGMMRT15,
  added-at = {2015-02-27T00:00:00.000+0100},
  author = {Omaña, Martin and Rossi, Daniele and Giaffreda, Daniele and Metra, Cecilia and Mak, T. M. and Rahman, Asifur and Tam, Simon},
  biburl = {http://www.bibsonomy.org/bibtex/2e12d8b84f4f67c46a98c660dab1130d6/dblp},
  ee = {http://dx.doi.org/10.1109/TVLSI.2014.2312431},
  interhash = {0140d4ea3f11d2bd04c89cdeb0c6081f},
  intrahash = {e12d8b84f4f67c46a98c660dab1130d6},
  journal = {IEEE Trans. VLSI Syst.},
  keywords = {dblp},
  number = 3,
  pages = {435-443},
  timestamp = {2015-06-17T22:10:33.000+0200},
  title = {Low-Cost On-Chip Clock Jitter Measurement Scheme.},
  url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#OmanaRGMMRT15},
  volume = 23,
  year = 2015
}

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