MAIA: a framework for networks on chip generation and verification. Ost, L., Mello, A., Palma, J., Moraes, F. G., & Calazans, N. In Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pages 49–52, 2005. ACM Press.
MAIA: a framework for networks on chip generation and verification [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/aspdac/OstMPMC05,
  author       = {Luciano Ost and
                  Aline Mello and
                  Jos{\'{e}} Palma and
                  Fernando Gehm Moraes and
                  Ney Calazans},
  editor       = {Tingao Tang},
  title        = {{MAIA:} a framework for networks on chip generation and verification},
  booktitle    = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
                  {ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
  pages        = {49--52},
  publisher    = {{ACM} Press},
  year         = {2005},
  url          = {https://doi.org/10.1145/1120725.1120741},
  doi          = {10.1145/1120725.1120741},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/OstMPMC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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