Numerical study on thermal impacts of different void patterns on performance of chip-scale packaged power device. Otiaba, K. C., Bhatti, R. S., Ekere, N. N., Mallik, S., Alam, M. O., Amalu, E. H., & Ekpu, M. Microelectron. Reliab., 52(7):1409-1419, 2012.
Numerical study on thermal impacts of different void patterns on performance of chip-scale packaged power device. [link]Link  Numerical study on thermal impacts of different void patterns on performance of chip-scale packaged power device. [link]Paper  bibtex   
@article{journals/mr/OtiabaBEMAAE12,
  added-at = {2020-02-22T00:00:00.000+0100},
  author = {Otiaba, Kenny C. and Bhatti, R. S. and Ekere, Ndy N. and Mallik, Sabuj and Alam, M. O. and Amalu, Emeka H. and Ekpu, Mathias},
  biburl = {https://www.bibsonomy.org/bibtex/22df77a65100bd8aa1875e0e3bf6d395e/dblp},
  ee = {https://doi.org/10.1016/j.microrel.2012.01.015},
  interhash = {5e33ba97cb2e1ecf965aeb16f03343b7},
  intrahash = {2df77a65100bd8aa1875e0e3bf6d395e},
  journal = {Microelectron. Reliab.},
  keywords = {dblp},
  number = 7,
  pages = {1409-1419},
  timestamp = {2020-02-25T13:30:02.000+0100},
  title = {Numerical study on thermal impacts of different void patterns on performance of chip-scale packaged power device.},
  url = {http://dblp.uni-trier.de/db/journals/mr/mr52.html#OtiabaBEMAAE12},
  volume = 52,
  year = 2012
}

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