@inproceedings{conf/vlsid/PVVS14,
  added-at = {2015-04-20T00:00:00.000+0200},
  author = {P., Sai Phaneendra and Vudadha, Chetan and Veeramachaneni, Sreehari and Srinivas, M. B.},
  biburl = {https://www.bibsonomy.org/bibtex/2904c68af4abf79d5ea071871ee6ae899/dblp},
  booktitle = {VLSI Design},
  crossref = {conf/vlsid/2014},
  ee = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2014.103},
  interhash = {719b64bc48d323ab3f92a741d2b0809a},
  intrahash = {904c68af4abf79d5ea071871ee6ae899},
  isbn = {978-1-4799-2513-1},
  keywords = {dblp},
  pages = {557-562},
  publisher = {IEEE Computer Society},
  timestamp = {2015-06-18T10:52:11.000+0200},
  title = {An Optimized Design of Reversible Quantum Comparator.},
  url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2014.html#PVVS14},
  year = 2014
}

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