@article{journals/sigarch/PajueloGV05,
  added-at = {2016-01-15T00:00:00.000+0100},
  author = {Pajuelo, Alex and González, Antonio and Valero, Mateo},
  biburl = {http://www.bibsonomy.org/bibtex/27ba6a0c6913e863e1944eb4135b73a81/dblp},
  ee = {http://doi.acm.org/10.1145/1101868.1101877},
  interhash = {74579c1ac4227dfa94ffc8dbb6462b91},
  intrahash = {7ba6a0c6913e863e1944eb4135b73a81},
  journal = {SIGARCH Computer Architecture News},
  keywords = {dblp},
  number = 3,
  pages = {49-56},
  timestamp = {2016-01-16T11:36:10.000+0100},
  title = {Speculative execution for hiding memory latency.},
  url = {http://dblp.uni-trier.de/db/journals/sigarch/sigarch33.html#PajueloGV05},
  volume = 33,
  year = 2005
}

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