Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. Palma, J. C. S., Indrusiak, L. S., Moraes, F. G., Ortiz, A. G., Glesner, M., & Reis, R. A. L. In Vounckx, J., Azémard, N., & Maurine, P., editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, volume 4148, of Lecture Notes in Computer Science, pages 603–613, 2006. Springer.
Paper doi bibtex @inproceedings{DBLP:conf/patmos/PalmaIMOGR06,
author = {Jos{\'{e}} Carlos S. Palma and
Leandro Soares Indrusiak and
Fernando Gehm Moraes and
Alberto Garc{\'{\i}}a Ortiz and
Manfred Glesner and
Ricardo A. L. Reis},
editor = {Johan Vounckx and
Nadine Az{\'{e}}mard and
Philippe Maurine},
title = {Adaptive Coding in Networks-on-Chip: Transition Activity Reduction
Versus Power Overhead of the Codec Circuitry},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
France, September 13-15, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4148},
pages = {603--613},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11847083\_59},
doi = {10.1007/11847083\_59},
timestamp = {Mon, 03 Mar 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/patmos/PalmaIMOGR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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