A scalable embedded DSP core for SoC applications. Panis, C., Hirnschrott, U., Farfeleder, S., Krall, A., Laure, G., Lazian, W., & Nurmi, J. In SoC, pages 85-88, 2004. IEEE.
A scalable embedded DSP core for SoC applications. [link]Link  A scalable embedded DSP core for SoC applications. [link]Paper  bibtex   
@inproceedings{conf/issoc/PanisHFKLLN04,
  added-at = {2020-04-06T00:00:00.000+0200},
  author = {Panis, Christian and Hirnschrott, Ulrich and Farfeleder, Stefan and Krall, Andreas and Laure, Gunther and Lazian, Wolfgang and Nurmi, Jari},
  biburl = {https://www.bibsonomy.org/bibtex/25f97a55d2ee3a70868eee11a3913029b/dblp},
  booktitle = {SoC},
  crossref = {conf/issoc/2004},
  ee = {https://doi.org/10.1109/ISSOC.2004.1411155},
  interhash = {71cd73cc6616a1ed3df248f463df5311},
  intrahash = {5f97a55d2ee3a70868eee11a3913029b},
  isbn = {0-7803-8558-6},
  keywords = {dblp},
  pages = {85-88},
  publisher = {IEEE},
  timestamp = {2020-04-07T11:40:56.000+0200},
  title = {A scalable embedded DSP core for SoC applications.},
  url = {http://dblp.uni-trier.de/db/conf/issoc/issoc2004.html#PanisHFKLLN04},
  year = 2004
}

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