Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers. Papameletis, C., Keller, B. L., Chickermane, V., Marinissen, E. J., & Hamdioui, S. In ETS, pages 1-6, 2013. IEEE Computer Society.
Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers. [link]Link  Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers. [link]Paper  bibtex   
@inproceedings{conf/ets/PapameletisKCMH13,
  added-at = {2015-08-20T00:00:00.000+0200},
  author = {Papameletis, Christos and Keller, Brion L. and Chickermane, Vivek and Marinissen, Erik Jan and Hamdioui, Said},
  biburl = {http://www.bibsonomy.org/bibtex/24850d44b66057669acd0b91f4cadce13/dblp},
  booktitle = {ETS},
  crossref = {conf/ets/2013},
  ee = {http://doi.ieeecomputersociety.org/10.1109/ETS.2013.6569350},
  interhash = {dbda05cefaf0a3be5deeaa33617bb877},
  intrahash = {4850d44b66057669acd0b91f4cadce13},
  isbn = {978-1-4673-6376-1},
  keywords = {dblp},
  pages = {1-6},
  publisher = {IEEE Computer Society},
  timestamp = {2015-08-21T11:42:40.000+0200},
  title = {Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers.},
  url = {http://dblp.uni-trier.de/db/conf/ets/ets2013.html#PapameletisKCMH13},
  year = 2013
}

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