A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy. Parashar, A., Gurumurthi, S., & Sivasubramaniam, A. In 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pages 376–386, 2004. ![A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy [link]](https://bibbase.org/img/filetypes/link.svg "link")
Paper doi bibtex @inproceedings{parashar_complexity-effective_2004,
title = {A {Complexity}-{Effective} {Approach} to {ALU} {Bandwidth} {Enhancement} for {Instruction}-{Level} {Temporal} {Redundancy}},
url = {https://doi.org/10.1109/ISCA.2004.1310789},
doi = {10.1109/ISCA.2004.1310789},
booktitle = {31st {International} {Symposium} on {Computer} {Architecture} ({ISCA} 2004), 19-23 {June} 2004, {Munich}, {Germany}},
author = {Parashar, Angshuman and Gurumurthi, Sudhanva and Sivasubramaniam, Anand},
year = {2004},
pages = {376--386}
}
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