Reducing wire delay penalty through value prediction. Parcerisa, J. and González, A. In Wolfe, A. and Schlansker, M. S., editors, MICRO, pages 317-326, 2000. ACM/IEEE Computer Society.
Link
Paper bibtex @inproceedings{conf/micro/ParcerisaG00,
added-at = {2016-01-16T00:00:00.000+0100},
author = {Parcerisa, Joan-Manuel and González, Antonio},
biburl = {http://www.bibsonomy.org/bibtex/2795206e1d8eef3ccd26cd29c3b93fecb/dblp},
booktitle = {MICRO},
crossref = {conf/micro/2000},
editor = {Wolfe, Andrew and Schlansker, Michael S.},
ee = {http://portal.acm.org/citation.cfm?id=360128.360163},
interhash = {db429a9bf36813d3f162d34aae798dbf},
intrahash = {795206e1d8eef3ccd26cd29c3b93fecb},
isbn = {0-7695-0924-x},
keywords = {dblp},
pages = {317-326},
publisher = {ACM/IEEE Computer Society},
timestamp = {2016-01-19T11:45:12.000+0100},
title = {Reducing wire delay penalty through value prediction.},
url = {http://dblp.uni-trier.de/db/conf/micro/micro2000.html#ParcerisaG00},
year = 2000
}