CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time. Peddersen, J. & Parameswaran, S. In Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pages 890–895, 2007. IEEE Computer Society.
CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/aspdac/PeddersenP07,
  author    = {Jorgen Peddersen and
               Sri Parameswaran},
  title     = {{CLIPPER:} Counter-based Low Impact Processor Power Estimation at
               Run-time},
  booktitle = {Proceedings of the 12th Conference on Asia South Pacific Design Automation,
               {ASP-DAC} 2007, Yokohama, Japan, January 23-26, 2007},
  pages     = {890--895},
  publisher = {{IEEE} Computer Society},
  year      = {2007},
  url       = {https://doi.org/10.1109/ASPDAC.2007.358102},
  doi       = {10.1109/ASPDAC.2007.358102},
  timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/PeddersenP07.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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