Fault-tolerant Typed Assembly Language. Perry, F., Mackey, L., Reis, G. A., Ligatti, J., August, D. I., & Walker, D. In Proceedings of the 28th ACM SIGPLAN Conference on Programming Language Design and Implementation, of PLDI '07, pages 42–53, New York, NY, USA, 2007. ACM. ZSCC: 0000052 event-place: San Diego, California, USA
Fault-tolerant Typed Assembly Language [link]Paper  doi  abstract   bibtex   
A transient hardware fault occurs when an energetic particle strikes a transistor, causing it to change state. Although transient faults do not permanently damage the hardware, they may corrupt computations by altering stored values and signal transfers. In this paper, we propose a new scheme for provably safe and reliable computing in the presence of transient hardware faults. In our scheme, software computations are replicated to provide redundancy while special instructions compare the independently computed results to detect errors before writing critical data. In stark contrast to any previous efforts in this area, we have analyzed our fault tolerance scheme from a formal, theoretical perspective. To be specific, first, we provide an operational semantics for our assembly language, which includes a precise formal definition of our fault model. Second, we develop an assembly-level type system designed to detect reliability problems in compiled code. Third, we provide a formal specification for program fault tolerance under the given fault model and prove that all well-typed programs are indeed fault tolerant. In addition to the formal analysis, we evaluate our detection scheme and show that it only takes 34% longer to execute than the unreliable version.
@inproceedings{perry_fault-tolerant_2007,
	address = {New York, NY, USA},
	series = {{PLDI} '07},
	title = {Fault-tolerant {Typed} {Assembly} {Language}},
	isbn = {978-1-59593-633-2},
	url = {http://doi.acm.org/10.1145/1250734.1250741},
	doi = {10/fjx85t},
	abstract = {A transient hardware fault occurs when an energetic particle strikes a transistor, causing it to change state. Although transient faults do not permanently damage the hardware, they may corrupt computations by altering stored values and signal transfers. In this paper, we propose a new scheme for provably safe and reliable computing in the presence of transient hardware faults. In our scheme, software computations are replicated to provide redundancy while special instructions compare the independently computed results to detect errors before writing critical data. In stark contrast to any previous efforts in this area, we have analyzed our fault tolerance scheme from a formal, theoretical perspective. To be specific, first, we provide an operational semantics for our assembly language, which includes a precise formal definition of our fault model. Second, we develop an assembly-level type system designed to detect reliability problems in compiled code. Third, we provide a formal specification for program fault tolerance under the given fault model and prove that all well-typed programs are indeed fault tolerant. In addition to the formal analysis, we evaluate our detection scheme and show that it only takes 34\% longer to execute than the unreliable version.},
	urldate = {2019-11-05},
	booktitle = {Proceedings of the 28th {ACM} {SIGPLAN} {Conference} on {Programming} {Language} {Design} and {Implementation}},
	publisher = {ACM},
	author = {Perry, Frances and Mackey, Lester and Reis, George A. and Ligatti, Jay and August, David I. and Walker, David},
	year = {2007},
	note = {ZSCC: 0000052 
event-place: San Diego, California, USA},
	keywords = {fault tolerance, soft faults, transient hardware faults, typed assembly language},
	pages = {42--53}
}

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