Protecting Hardware IP Cores During High-Level Synthesis. Pilato, C., Sciuto, D., Regazzoni, F., Garg, S., & Karri, R. In Behavioral Synthesis for Hardware Security, pages 95–115. 2022.
Protecting Hardware IP Cores During High-Level Synthesis [link]Paper  doi  bibtex   
@incollection{DBLP:books/sp/22/PilatoS0GK22,
  author    = {Christian Pilato and
               Donatella Sciuto and
               Francesco Regazzoni and
               Siddharth Garg and
               Ramesh Karri},
  title     = {Protecting Hardware {IP} Cores During High-Level Synthesis},
  booktitle = {Behavioral Synthesis for Hardware Security},
  pages     = {95--115},
  year      = {2022},
  url       = {https://doi.org/10.1007/978-3-030-78841-4\_6},
  doi       = {10.1007/978-3-030-78841-4\_6},
  timestamp = {Tue, 05 Jul 2022 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/books/sp/22/PilatoS0GK22.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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