@article{DBLP:journals/tvlsi/PotlapallyRRLJ07,
  author    = {Nachiketh R. Potlapally and
               Srivaths Ravi and
               Anand Raghunathan and
               Ruby B. Lee and
               Niraj K. Jha},
  title     = {Configuration and Extension of Embedded Processors to Optimize IPSec
               Protocol Execution},
  journal   = {{IEEE} Trans. {VLSI} Syst.},
  volume    = {15},
  number    = {5},
  pages     = {605--609},
  year      = {2007},
  url       = {https://doi.org/10.1109/TVLSI.2007.896912},
  doi       = {10.1109/TVLSI.2007.896912},
  timestamp = {Thu, 18 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tvlsi/PotlapallyRRLJ07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

{"_id":"tGDG4YvHvF5PbQyE8","bibbaseid":"potlapally-ravi-raghunathan-lee-jha-configurationandextensionofembeddedprocessorstooptimizeipsecprotocolexecution-2007","downloads":0,"creationDate":"2018-06-20T07:11:31.594Z","title":"Configuration and Extension of Embedded Processors to Optimize IPSec Protocol Execution","author_short":["Potlapally, N. R.","Ravi, S.","Raghunathan, A.","Lee, R. B.","Jha, N. K."],"year":2007,"bibtype":"article","biburl":"https://dblp.org/pid/74/3747.bib","bibdata":{"bibtype":"article","type":"article","author":[{"firstnames":["Nachiketh","R."],"propositions":[],"lastnames":["Potlapally"],"suffixes":[]},{"firstnames":["Srivaths"],"propositions":[],"lastnames":["Ravi"],"suffixes":[]},{"firstnames":["Anand"],"propositions":[],"lastnames":["Raghunathan"],"suffixes":[]},{"firstnames":["Ruby","B."],"propositions":[],"lastnames":["Lee"],"suffixes":[]},{"firstnames":["Niraj","K."],"propositions":[],"lastnames":["Jha"],"suffixes":[]}],"title":"Configuration and Extension of Embedded Processors to Optimize IPSec Protocol Execution","journal":"IEEE Trans. VLSI Syst.","volume":"15","number":"5","pages":"605–609","year":"2007","url":"https://doi.org/10.1109/TVLSI.2007.896912","doi":"10.1109/TVLSI.2007.896912","timestamp":"Thu, 18 May 2017 01:00:00 +0200","biburl":"https://dblp.org/rec/bib/journals/tvlsi/PotlapallyRRLJ07","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@article{DBLP:journals/tvlsi/PotlapallyRRLJ07,\n author = {Nachiketh R. Potlapally and\n Srivaths Ravi and\n Anand Raghunathan and\n Ruby B. Lee and\n Niraj K. Jha},\n title = {Configuration and Extension of Embedded Processors to Optimize IPSec\n Protocol Execution},\n journal = {{IEEE} Trans. {VLSI} Syst.},\n volume = {15},\n number = {5},\n pages = {605--609},\n year = {2007},\n url = {https://doi.org/10.1109/TVLSI.2007.896912},\n doi = {10.1109/TVLSI.2007.896912},\n timestamp = {Thu, 18 May 2017 01:00:00 +0200},\n biburl = {https://dblp.org/rec/bib/journals/tvlsi/PotlapallyRRLJ07},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Potlapally, N. R.","Ravi, S.","Raghunathan, A.","Lee, R. B.","Jha, N. K."],"key":"DBLP:journals/tvlsi/PotlapallyRRLJ07","id":"DBLP:journals/tvlsi/PotlapallyRRLJ07","bibbaseid":"potlapally-ravi-raghunathan-lee-jha-configurationandextensionofembeddedprocessorstooptimizeipsecprotocolexecution-2007","role":"author","urls":{"Paper":"https://doi.org/10.1109/TVLSI.2007.896912"},"downloads":0},"search_terms":["configuration","extension","embedded","processors","optimize","ipsec","protocol","execution","potlapally","ravi","raghunathan","lee","jha"],"keywords":[],"authorIDs":[],"dataSources":["QATSsZPCAGgNRpLA3"]}