High-level macro-modeling and estimation techniques for switching activity and power consumption. Raghunathan, A., Dey, S., & Jha, N. K. IEEE Trans. VLSI Syst., 11(4):538–557, 2003.
High-level macro-modeling and estimation techniques for switching activity and power consumption [link]Paper  doi  bibtex   
@article{DBLP:journals/tvlsi/RaghunathanDJ03,
  author    = {Anand Raghunathan and
               Sujit Dey and
               Niraj K. Jha},
  title     = {High-level macro-modeling and estimation techniques for switching
               activity and power consumption},
  journal   = {{IEEE} Trans. {VLSI} Syst.},
  volume    = {11},
  number    = {4},
  pages     = {538--557},
  year      = {2003},
  url       = {https://doi.org/10.1109/TVLSI.2003.812295},
  doi       = {10.1109/TVLSI.2003.812295},
  timestamp = {Thu, 18 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tvlsi/RaghunathanDJ03},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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