Approximate memory compression for energy-efficiency. Ranjan, A., Raha, A., Raghunathan, V., & Raghunathan, A. In 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017, pages 1–6, 2017.
Paper doi bibtex @inproceedings{DBLP:conf/islped/RanjanRRR17,
author = {Ashish Ranjan and
Arnab Raha and
Vijay Raghunathan and
Anand Raghunathan},
title = {Approximate memory compression for energy-efficiency},
booktitle = {2017 {IEEE/ACM} International Symposium on Low Power Electronics and
Design, {ISLPED} 2017, Taipei, Taiwan, July 24-26, 2017},
pages = {1--6},
year = {2017},
crossref = {DBLP:conf/islped/2017},
url = {https://doi.org/10.1109/ISLPED.2017.8009173},
doi = {10.1109/ISLPED.2017.8009173},
timestamp = {Thu, 17 Aug 2017 09:48:07 +0200},
biburl = {https://dblp.org/rec/bib/conf/islped/RanjanRRR17},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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