Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment. Riahi, P. A., Navabi, Z., & Lombardi, F. In Arabnia, H. R. & Yang, L. T., editors, Embedded Systems and Applications, pages 139-143, 2003. CSREA Press.
Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment. [link]Paper  bibtex   
@inproceedings{conf/csreaESA/RiahiNL03,
  added-at = {2003-10-16T00:00:00.000+0200},
  author = {Riahi, Pedram A. and Navabi, Zainalabedin and Lombardi, Fabrizio},
  biburl = {http://www.bibsonomy.org/bibtex/2e0e6d838574b528087ba866cf6dd501e/dblp},
  booktitle = {Embedded Systems and Applications},
  crossref = {conf/csreaESA/2003},
  date = {2003-10-16},
  description = {dblp},
  editor = {Arabnia, Hamid R. and Yang, Laurence Tianruo},
  interhash = {61b89a8084f3e0c57ddd322a25a429c0},
  intrahash = {e0e6d838574b528087ba866cf6dd501e},
  isbn = {1-932415-05-X},
  keywords = {dblp},
  pages = {139-143},
  publisher = {CSREA Press},
  timestamp = {2003-10-16T00:00:00.000+0200},
  title = {Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment.},
  url = {http://dblp.uni-trier.de/db/conf/csreaESA/csreaESA2003.html#RiahiNL03},
  year = 2003
}

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