@article{journals/jssc/RusuTMSACVRKV10,
  added-at = {2012-01-09T00:00:00.000+0100},
  author = {Rusu, Stefan and Tam, Simon and Muljono, Harry and Stinson, Jason and Ayers, David and Chang, Jonathan and Varada, Raj and Ratta, Matt and Kottapalli, Sailesh and Vora, Sujal},
  biburl = {http://www.bibsonomy.org/bibtex/2a9f5f5316e41d51100f4b603f12635a1/dblp},
  ee = {http://dx.doi.org/10.1109/JSSC.2009.2034076},
  interhash = {b1c2c26728246552a03f78ce7691b90a},
  intrahash = {a9f5f5316e41d51100f4b603f12635a1},
  journal = {J. Solid-State Circuits},
  keywords = {dblp},
  number = 1,
  pages = {7-14},
  timestamp = {2012-01-10T11:33:38.000+0100},
  title = {A 45 nm 8-Core Enterprise Xeon¯ Processor.},
  url = {http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#RusuTMSACVRKV10},
  volume = 45,
  year = 2010
}

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