Improving VLSI design processes using Hierarchical concurrent flow graph approach. Sahula, V & Ravikumar, C P In 4th IEEE VLSI Design and Test Workshops, 2000.
bibtex   
@InProceedings{ravikumar2000improving,
  Title                    = {{Improving VLSI design processes using Hierarchical concurrent flow graph approach}},
  Author                   = {Sahula, V and Ravikumar, C P},
  Booktitle                = {4th IEEE VLSI Design and Test Workshops},
  Year                     = {2000}
}

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