@inProceedings{
 title = {CMOS square-law programmable floating resistor},
 type = {inProceedings},
 year = {1993},
 identifiers = {[object Object]},
 volume = {2},
 id = {b95e1eb0-dc57-3b9e-8f44-cb68a76a2b76},
 created = {2017-12-04T05:34:49.703Z},
 file_attached = {false},
 profile_id = {99d7e05e-a704-3549-ada2-dfc74a2d55ec},
 last_modified = {2017-12-04T05:34:49.703Z},
 read = {false},
 starred = {false},
 authored = {true},
 confirmed = {false},
 hidden = {false},
 private_publication = {false},
 abstract = {A CMOS architecture for a floating linear resistor which exploits the square-law model of the MOS transistor is presented. The architecture is programmable by DC control voltage and it is threshold voltage independent. The architecture is fabricated in a 2μm p-well CMOS MOSIS process. The resistor occupies 210μm × 270μm, consumes 4-4mW with ±V supply and exhibits a sign (at 1% THD) to noise ratio of more than 100dB over a IV range of the DC control voltage.},
 bibtype = {inProceedings},
 author = {Sakurai, Satoshi and Ismail, Mohammed},
 booktitle = {Proceedings - IEEE International Symposium on Circuits and Systems}
}

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