@inproceedings{conf/asap/SchwarzHKRS94,
  added-at = {2016-01-20T00:00:00.000+0100},
  author = {Schwarz, Markus and Hosticka, Bedrich J. and Kesper, M. and Richert, Peter and Scholles, Michael},
  biburl = {http://www.bibsonomy.org/bibtex/2a9eabd0c7b93be339281ac9a05a06b17/dblp},
  booktitle = {ASAP},
  crossref = {conf/asap/1994},
  ee = {http://dx.doi.org/10.1109/ASAP.1994.331787},
  interhash = {19a2e65cd0fc6d268db9ad677a709f8b},
  intrahash = {a9eabd0c7b93be339281ac9a05a06b17},
  isbn = {0-8186-6517-3},
  keywords = {dblp},
  pages = {381-391},
  publisher = {IEEE},
  timestamp = {2016-01-21T11:39:34.000+0100},
  title = {A parallel DSP-based neural network emulator with CMOS VLSI packet switching hardware.},
  url = {http://dblp.uni-trier.de/db/conf/asap/asap1994.html#SchwarzHKRS94},
  year = 1994
}

{"_id":"sqwxL5kGG5mjLfeHY","bibbaseid":"schwarz-hosticka-kesper-richert-scholles-aparalleldspbasedneuralnetworkemulatorwithcmosvlsipacketswitchinghardware-1994","downloads":0,"creationDate":"2016-02-09T05:23:26.357Z","title":"A parallel DSP-based neural network emulator with CMOS VLSI packet switching hardware.","author_short":["Schwarz, M.","Hosticka, B. J.","Kesper, M.","Richert, P.","Scholles, M."],"year":1994,"bibtype":"inproceedings","biburl":"http://www.bibsonomy.org/bib/author/Peter Bryner?items=1000","bibdata":{"bibtype":"inproceedings","type":"inproceedings","added-at":"2016-01-20T00:00:00.000+0100","author":[{"propositions":[],"lastnames":["Schwarz"],"firstnames":["Markus"],"suffixes":[]},{"propositions":[],"lastnames":["Hosticka"],"firstnames":["Bedrich","J."],"suffixes":[]},{"propositions":[],"lastnames":["Kesper"],"firstnames":["M."],"suffixes":[]},{"propositions":[],"lastnames":["Richert"],"firstnames":["Peter"],"suffixes":[]},{"propositions":[],"lastnames":["Scholles"],"firstnames":["Michael"],"suffixes":[]}],"biburl":"http://www.bibsonomy.org/bibtex/2a9eabd0c7b93be339281ac9a05a06b17/dblp","booktitle":"ASAP","crossref":"conf/asap/1994","ee":"http://dx.doi.org/10.1109/ASAP.1994.331787","interhash":"19a2e65cd0fc6d268db9ad677a709f8b","intrahash":"a9eabd0c7b93be339281ac9a05a06b17","isbn":"0-8186-6517-3","keywords":"dblp","pages":"381-391","publisher":"IEEE","timestamp":"2016-01-21T11:39:34.000+0100","title":"A parallel DSP-based neural network emulator with CMOS VLSI packet switching hardware.","url":"http://dblp.uni-trier.de/db/conf/asap/asap1994.html#SchwarzHKRS94","year":"1994","bibtex":"@inproceedings{conf/asap/SchwarzHKRS94,\n added-at = {2016-01-20T00:00:00.000+0100},\n author = {Schwarz, Markus and Hosticka, Bedrich J. and Kesper, M. and Richert, Peter and Scholles, Michael},\n biburl = {http://www.bibsonomy.org/bibtex/2a9eabd0c7b93be339281ac9a05a06b17/dblp},\n booktitle = {ASAP},\n crossref = {conf/asap/1994},\n ee = {http://dx.doi.org/10.1109/ASAP.1994.331787},\n interhash = {19a2e65cd0fc6d268db9ad677a709f8b},\n intrahash = {a9eabd0c7b93be339281ac9a05a06b17},\n isbn = {0-8186-6517-3},\n keywords = {dblp},\n pages = {381-391},\n publisher = {IEEE},\n timestamp = {2016-01-21T11:39:34.000+0100},\n title = {A parallel DSP-based neural network emulator with CMOS VLSI packet switching hardware.},\n url = {http://dblp.uni-trier.de/db/conf/asap/asap1994.html#SchwarzHKRS94},\n year = 1994\n}\n\n","author_short":["Schwarz, M.","Hosticka, B. J.","Kesper, M.","Richert, P.","Scholles, M."],"key":"conf/asap/SchwarzHKRS94","id":"conf/asap/SchwarzHKRS94","bibbaseid":"schwarz-hosticka-kesper-richert-scholles-aparalleldspbasedneuralnetworkemulatorwithcmosvlsipacketswitchinghardware-1994","role":"author","urls":{"Link":"http://dx.doi.org/10.1109/ASAP.1994.331787","Paper":"http://dblp.uni-trier.de/db/conf/asap/asap1994.html#SchwarzHKRS94"},"keyword":["dblp"],"downloads":0},"search_terms":["parallel","dsp","based","neural","network","emulator","cmos","vlsi","packet","switching","hardware","schwarz","hosticka","kesper","richert","scholles"],"keywords":["dblp"],"authorIDs":[],"dataSources":["R7Sibxa4rHybrdx8J"]}