Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication. Sekar, K., Lahiri, K., Raghunathan, A., & Dey, S. IEEE Trans. VLSI Syst., 16(10):1413–1426, 2008.
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication [link]Paper  doi  bibtex   
@article{DBLP:journals/tvlsi/SekarLRD08,
  author    = {Krishna Sekar and
               Kanishka Lahiri and
               Anand Raghunathan and
               Sujit Dey},
  title     = {Dynamically Configurable Bus Topologies for High-Performance On-Chip
               Communication},
  journal   = {{IEEE} Trans. {VLSI} Syst.},
  volume    = {16},
  number    = {10},
  pages     = {1413--1426},
  year      = {2008},
  url       = {https://doi.org/10.1109/TVLSI.2008.2000727},
  doi       = {10.1109/TVLSI.2008.2000727},
  timestamp = {Thu, 18 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tvlsi/SekarLRD08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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