A dynamically reconfigurable cache for multithreaded processors. Settle, A., Connors, D., Gibert, E., & González, A. J. Embedded Computing, 2(2):221-233, 2006.
A dynamically reconfigurable cache for multithreaded processors. [link]Link  A dynamically reconfigurable cache for multithreaded processors. [link]Paper  bibtex   
@article{journals/jec/SettleCGG06,
  added-at = {2016-01-16T00:00:00.000+0100},
  author = {Settle, Alex and Connors, Dan and Gibert, Enric and González, Antonio},
  biburl = {http://www.bibsonomy.org/bibtex/288137c604eff22a220c5c5605677badc/dblp},
  ee = {http://content.iospress.com/articles/journal-of-embedded-computing/jec00027},
  interhash = {07245b08aef00f4a0bcc665c92137f3d},
  intrahash = {88137c604eff22a220c5c5605677badc},
  journal = {J. Embedded Computing},
  keywords = {dblp},
  number = 2,
  pages = {221-233},
  timestamp = {2016-01-19T11:36:51.000+0100},
  title = {A dynamically reconfigurable cache for multithreaded processors.},
  url = {http://dblp.uni-trier.de/db/journals/jec/jec2.html#SettleCGG06},
  volume = 2,
  year = 2006
}
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