SimdHT-Bench: Characterizing SIMD-Aware Hash Table Designs on Emerging CPU Architectures. Shankar, D., Lu, X., & Panda, D. K. D. K. In IISWC, pages 178-188, 2019. IEEE. Link Paper bibtex 1 download @inproceedings{conf/iiswc/ShankarLP19,
added-at = {2020-03-23T00:00:00.000+0100},
author = {Shankar, Dipti and Lu, Xiaoyi and Panda, Dhabaleswar K. D. K.},
biburl = {https://www.bibsonomy.org/bibtex/21fe2ee0c386a2946768b3f548a616ba9/dblp},
booktitle = {IISWC},
crossref = {conf/iiswc/2019},
ee = {https://doi.org/10.1109/IISWC47752.2019.9042069},
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intrahash = {1fe2ee0c386a2946768b3f548a616ba9},
isbn = {978-1-7281-4045-2},
keywords = {dblp},
pages = {178-188},
publisher = {IEEE},
timestamp = {2020-03-24T11:40:24.000+0100},
title = {SimdHT-Bench: Characterizing SIMD-Aware Hash Table Designs on Emerging CPU Architectures.},
url = {http://dblp.uni-trier.de/db/conf/iiswc/iiswc2019.html#ShankarLP19},
year = 2019
}
Downloads: 1
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