@inproceedings{conf/cdes/SharmaSCRKC08,
  added-at = {2015-12-05T00:00:00.000+0100},
  author = {Sharma, Rohit and Sehgal, Vivek Kumar and Nitin and Rawat, Saumya and Kapoor, Vinodini and Chadha, Sonia},
  biburl = {http://www.bibsonomy.org/bibtex/2f6c961c4cd825b6451003959f1a81268/dblp},
  booktitle = {CDES},
  crossref = {conf/cdes/2008},
  editor = {Arabnia, Hamid R.},
  interhash = {388b30999a4cc25a2c48492c02c6842a},
  intrahash = {f6c961c4cd825b6451003959f1a81268},
  isbn = {1-60132-056-6},
  keywords = {dblp},
  pages = {57-60},
  publisher = {CSREA Press},
  timestamp = {2015-12-10T12:03:12.000+0100},
  title = {Time-Domain Analysis of VLSI Interconnects Considering Oscillatory Inputs.},
  url = {http://dblp.uni-trier.de/db/conf/cdes/cdes2008.html#SharmaSCRKC08},
  year = 2008
}

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