@inproceedings{DBLP:conf/isvlsi/SharmaS17,
  author    = {Tannu Sharma and
               Kenneth S. Stevens},
  title     = {Physical Design Variation in Relative Timed Asynchronous Circuits},
  booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
               Bochum, Germany, July 3-5, 2017},
  pages     = {278--283},
  year      = {2017},
  crossref  = {DBLP:conf/isvlsi/2017},
  url       = {https://doi.org/10.1109/ISVLSI.2017.56},
  doi       = {10.1109/ISVLSI.2017.56},
  timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isvlsi/SharmaS17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

{"_id":"L8bE2TNSPGAqd455N","bibbaseid":"sharma-stevens-physicaldesignvariationinrelativetimedasynchronouscircuits-2017","authorIDs":[],"author_short":["Sharma, T.","Stevens, K. S."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Tannu"],"propositions":[],"lastnames":["Sharma"],"suffixes":[]},{"firstnames":["Kenneth","S."],"propositions":[],"lastnames":["Stevens"],"suffixes":[]}],"title":"Physical Design Variation in Relative Timed Asynchronous Circuits","booktitle":"2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017","pages":"278–283","year":"2017","crossref":"DBLP:conf/isvlsi/2017","url":"https://doi.org/10.1109/ISVLSI.2017.56","doi":"10.1109/ISVLSI.2017.56","timestamp":"Wed, 16 Oct 2019 14:14:54 +0200","biburl":"https://dblp.org/rec/bib/conf/isvlsi/SharmaS17","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/isvlsi/SharmaS17,\n author = {Tannu Sharma and\n Kenneth S. Stevens},\n title = {Physical Design Variation in Relative Timed Asynchronous Circuits},\n booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,\n Bochum, Germany, July 3-5, 2017},\n pages = {278--283},\n year = {2017},\n crossref = {DBLP:conf/isvlsi/2017},\n url = {https://doi.org/10.1109/ISVLSI.2017.56},\n doi = {10.1109/ISVLSI.2017.56},\n timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},\n biburl = {https://dblp.org/rec/bib/conf/isvlsi/SharmaS17},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Sharma, T.","Stevens, K. S."],"key":"DBLP:conf/isvlsi/SharmaS17","id":"DBLP:conf/isvlsi/SharmaS17","bibbaseid":"sharma-stevens-physicaldesignvariationinrelativetimedasynchronouscircuits-2017","role":"author","urls":{"Paper":"https://doi.org/10.1109/ISVLSI.2017.56"},"downloads":0,"html":""},"bibtype":"inproceedings","biburl":"https://ycunxi.github.io/utah-csl/bibtex/all.bib","creationDate":"2019-11-14T21:37:03.934Z","downloads":0,"keywords":[],"search_terms":["physical","design","variation","relative","timed","asynchronous","circuits","sharma","stevens"],"title":"Physical Design Variation in Relative Timed Asynchronous Circuits","year":2017,"dataSources":["L6BLFSB28hKk5Nt67"]}