Design, Implementation and Security Analysis of Hardware Trojan Threats in FPGA

Design, Implementation and Security Analysis of Hardware Trojan Threats in FPGA. Shila, D. & Venugopalan, V. In IEEE International Conference on Communications (ICC), pages 719-724, June, 2014.
bibtex

@inproceedings{Shila2014Design-imp2,
	author = {Shila, Devu and Venugopalan, Vivek},
	booktitle = {IEEE International Conference on Communications (ICC)},
	date-added = {2020-01-15 12:02:05 -0500},
	date-modified = {2020-01-15 12:02:05 -0500},
	keywords = {Encryption;Field programmable gate arrays;Hardware;Power demand;Timing;Trojan horses;Design;Hardware Trojans;Resiliency;Security},
	month = jun,
	pages = {719-724},
	title = {{Design, Implementation and Security Analysis of Hardware Trojan Threats in FPGA}},
	year = {2014},
	Bdsk-File-1 = {YnBsaXN0MDDSAQIDBFxyZWxhdGl2ZVBhdGhZYWxpYXNEYXRhXxAsLi4vLi4vcmVmZXJlbmNlcy9QREYvU2hpbGEyMDE0RGVzaWduLWltcC5wZGZPEQGCAAAAAAGCAAIAAAxNYWNpbnRvc2ggSEQAAAAAAAAAAAAAAAAAAAAAAAAAQkQAAf////8XU2hpbGEyMDE0RGVzaWduLWltcC5wZGYAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA/////wAAAAAAAAAAAAAAAAACAAMAAAogY3UAAAAAAAAAAAAAAAAAA1BERgAAAgA9LzpVc2Vyczp2aXZla3Y6RHJvcGJveDpyZWZlcmVuY2VzOlBERjpTaGlsYTIwMTREZXNpZ24taW1wLnBkZgAADgAwABcAUwBoAGkAbABhADIAMAAxADQARABlAHMAaQBnAG4ALQBpAG0AcAAuAHAAZABmAA8AGgAMAE0AYQBjAGkAbgB0AG8AcwBoACAASABEABIAO1VzZXJzL3ZpdmVrdi9Ecm9wYm94L3JlZmVyZW5jZXMvUERGL1NoaWxhMjAxNERlc2lnbi1pbXAucGRmAAATAAEvAAAVAAIADf//AAAACAANABoAJABTAAAAAAAAAgEAAAAAAAAABQAAAAAAAAAAAAAAAAAAAdk=},
	Bdsk-Url-1 = {http://dx.doi.org/10.1109/ICC.2014.6883404}}

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