Buffer and Delay Bounds in High Radix Interconnection Networks. Singh, A. & Dally, W. J. Computer Architecture Letters (CAL), 2004.
Buffer and Delay Bounds in High Radix Interconnection Networks [link]Paper  bibtex   
@article{ dblp2914863,
  title = {Buffer and Delay Bounds in High Radix Interconnection Networks},
  author = {Arjun Singh and William J. Dally},
  author_short = {Singh, A. and Dally, W. J.},
  bibtype = {article},
  type = {article},
  year = {2004},
  key = {dblp2914863},
  id = {dblp2914863},
  biburl = {http://www.dblp.org/rec/bibtex/journals/cal/SinghD04},
  url = {http://doi.ieeecomputersociety.org/10.1109/L-CA.2004.2},
  journal = {Computer Architecture Letters (CAL)},
  volume = {3},
  text = {Computer Architecture Letters (CAL) 3 (2004)}
}

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