ReFloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers. Song, L., <a href="https://homes.luddy.indiana.edu/fc7/" target="_bilank">Fan Chen</a></span>, Li, H., & Chen, Y. In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC), pages 75:1–75:15, 2023. ACM.
ReFloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers [link]Paper  doi  abstract   bibtex   1 download  
Resistive random access memory (ReRAM) is a promising technology that can perform low-cost and in-situ matrix-vector multiplication (MVM) in analog domain. Scientific computing requires high-precision floating-point (FP) processing. However, performing floating-point computation in ReRAM is challenging because of high hardware cost and execution time due to the large FP value range. In this work we present ReFloat, a data format and an accelerator architecture, for low-cost and high-performance floating-point processing in ReRAM for iterative linear solvers. ReFloat matches the ReRAM crossbar hardware and represents a block of FP values with reduced bits and an optimized exponent base for a high range of dynamic representation. Thus, ReFloat achieves less ReRAM crossbar consumption and fewer processing cycles and overcomes the noncovergence issue in a prior work. The evaluation on the SuiteSparse matrices shows ReFloat achieves 5.02× to 84.28× improvement in terms of solver time compared to a state-of-the-art ReRAM based accelerator.
@inproceedings{SC2023,
 author = {Linghao {Song} and {<a href="https://homes.luddy.indiana.edu/fc7/" target="_bilank">Fan Chen</a></span>} and Hai {Li} and Yiran Chen},
 title = {ReFloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers},
 booktitle = {Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC)},
 pages        = {75:1--75:15},
 publisher    = {{ACM}},
 year         = {2023},
 url          = {https://doi.org/10.1145/3581784.3607077},
 doi          = {10.1145/3581784.3607077},
 abstract = {Resistive random access memory (ReRAM) is a promising technology that can perform low-cost and in-situ matrix-vector multiplication (MVM) in analog domain. Scientific computing requires high-precision floating-point (FP) processing. However, performing floating-point computation in ReRAM is challenging because of high hardware cost and execution time due to the large FP value range. In this work we present ReFloat, a data format and an accelerator architecture, for low-cost and high-performance floating-point processing in ReRAM for iterative linear solvers. ReFloat matches the ReRAM crossbar hardware and represents a block of FP values with reduced bits and an optimized exponent base for a high range of dynamic representation. Thus, ReFloat achieves less ReRAM crossbar consumption and fewer processing cycles and overcomes the noncovergence issue in a prior work. The evaluation on the SuiteSparse matrices shows ReFloat achieves 5.02\texttimes{} to 84.28\texttimes{} improvement in terms of solver time compared to a state-of-the-art ReRAM based accelerator.},
}

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