@article{journals/tvlsi/SrinivasanCK06,
  added-at = {2016-03-15T00:00:00.000+0100},
  author = {Srinivasan, Krishnan and Chatha, Karam S. and Konjevod, Goran},
  biburl = {http://www.bibsonomy.org/bibtex/2a5ab7ec014a03d258d2d8b0ec1ea700e/dblp},
  ee = {http://dx.doi.org/10.1109/TVLSI.2006.871762},
  interhash = {ef940f2f455ac95514022de398585104},
  intrahash = {a5ab7ec014a03d258d2d8b0ec1ea700e},
  journal = {IEEE Trans. VLSI Syst.},
  keywords = {dblp},
  number = 4,
  pages = {407-420},
  timestamp = {2016-03-16T11:41:04.000+0100},
  title = {Linear-programming-based techniques for synthesis of network-on-chip architectures.},
  url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SrinivasanCK06},
  volume = 14,
  year = 2006
}

{"_id":"Zikkr2nCZMQMrrERq","bibbaseid":"srinivasan-chatha-konjevod-linearprogrammingbasedtechniquesforsynthesisofnetworkonchiparchitectures-2006","downloads":0,"creationDate":"2016-10-11T08:28:53.109Z","title":"Linear-programming-based techniques for synthesis of network-on-chip architectures.","author_short":["Srinivasan, K.","Chatha, K. S.","Konjevod, G."],"year":2006,"bibtype":"article","biburl":"http://www.bibsonomy.org/bib/author/krishnan?items=1000","bibdata":{"bibtype":"article","type":"article","added-at":"2016-03-15T00:00:00.000+0100","author":[{"propositions":[],"lastnames":["Srinivasan"],"firstnames":["Krishnan"],"suffixes":[]},{"propositions":[],"lastnames":["Chatha"],"firstnames":["Karam","S."],"suffixes":[]},{"propositions":[],"lastnames":["Konjevod"],"firstnames":["Goran"],"suffixes":[]}],"biburl":"http://www.bibsonomy.org/bibtex/2a5ab7ec014a03d258d2d8b0ec1ea700e/dblp","ee":"http://dx.doi.org/10.1109/TVLSI.2006.871762","interhash":"ef940f2f455ac95514022de398585104","intrahash":"a5ab7ec014a03d258d2d8b0ec1ea700e","journal":"IEEE Trans. VLSI Syst.","keywords":"dblp","number":"4","pages":"407-420","timestamp":"2016-03-16T11:41:04.000+0100","title":"Linear-programming-based techniques for synthesis of network-on-chip architectures.","url":"http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SrinivasanCK06","volume":"14","year":"2006","bibtex":"@article{journals/tvlsi/SrinivasanCK06,\n added-at = {2016-03-15T00:00:00.000+0100},\n author = {Srinivasan, Krishnan and Chatha, Karam S. and Konjevod, Goran},\n biburl = {http://www.bibsonomy.org/bibtex/2a5ab7ec014a03d258d2d8b0ec1ea700e/dblp},\n ee = {http://dx.doi.org/10.1109/TVLSI.2006.871762},\n interhash = {ef940f2f455ac95514022de398585104},\n intrahash = {a5ab7ec014a03d258d2d8b0ec1ea700e},\n journal = {IEEE Trans. VLSI Syst.},\n keywords = {dblp},\n number = 4,\n pages = {407-420},\n timestamp = {2016-03-16T11:41:04.000+0100},\n title = {Linear-programming-based techniques for synthesis of network-on-chip architectures.},\n url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SrinivasanCK06},\n volume = 14,\n year = 2006\n}\n\n","author_short":["Srinivasan, K.","Chatha, K. S.","Konjevod, G."],"key":"journals/tvlsi/SrinivasanCK06","id":"journals/tvlsi/SrinivasanCK06","bibbaseid":"srinivasan-chatha-konjevod-linearprogrammingbasedtechniquesforsynthesisofnetworkonchiparchitectures-2006","role":"author","urls":{"Link":"http://dx.doi.org/10.1109/TVLSI.2006.871762","Paper":"http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SrinivasanCK06"},"keyword":["dblp"],"downloads":0},"search_terms":["linear","programming","based","techniques","synthesis","network","chip","architectures","srinivasan","chatha","konjevod"],"keywords":["dblp"],"authorIDs":[],"dataSources":["xsmEhpcqYQxeyggwv"]}