An Efficient Motion Adaptive De-interlacing and Its VLSI Architecture Design. Sun, H., Zheng, N., Ge, C., Wang, D., & Ren, P. In Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pages 455-458, 2008. Paper bibtex @inproceedings{ dblp3427082,
title = {An Efficient Motion Adaptive De-interlacing and Its VLSI Architecture Design},
author = {Hongbin Sun and Nanning Zheng and Chenyang Ge and Dong Wang and Pengju Ren},
author_short = {Sun, H. and Zheng, N. and Ge, C. and Wang, D. and Ren, P.},
bibtype = {inproceedings},
type = {inproceedings},
year = {2008},
key = {dblp3427082},
id = {dblp3427082},
biburl = {http://www.dblp.org/rec/bibtex/conf/isvlsi/SunZGWR08},
url = {http://dx.doi.org/10.1109/ISVLSI.2008.46},
conference = {ISVLSI},
pages = {455-458},
text = {ISVLSI 2008:455-458},
booktitle = {Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}
}
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