Ultra-energy-efficient temperature-stable physical unclonable function in 65 nm CMOS. Tao, S. & Dubrova, E. Electronics Letters, 2016. abstract bibtex © The Institution of Engineering and Technology 2016. Physical unclonable functions (PUFs) are promising hardware security primitives suitable for resource-constrained devices requiring lightweight cryptographic methods. This Letter proposes an ultra-lowpower and reliable PUF based on a customised dynamic two-stage comparator operating in the sub-threshold region. The proposed PUF is implemented in a standard 65 nm CMOS technology and validated through Monte-Carlo simulations. Evaluation results show a worstcase reliability of 98.3% over the commercial temperature range of 0C to 85C and 10% fluctuations in supply voltage. In addition, the 128-bit PUF array consumes only 1.33 ?W at 1 Mb/s, which corresponds to 10.3 fJ/bit, being the most energy-efficient design to date.
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title = {Ultra-energy-efficient temperature-stable physical unclonable function in 65 nm CMOS},
type = {article},
year = {2016},
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created = {2017-12-04T05:34:44.317Z},
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abstract = {© The Institution of Engineering and Technology 2016. Physical unclonable functions (PUFs) are promising hardware security primitives suitable for resource-constrained devices requiring lightweight cryptographic methods. This Letter proposes an ultra-lowpower and reliable PUF based on a customised dynamic two-stage comparator operating in the sub-threshold region. The proposed PUF is implemented in a standard 65 nm CMOS technology and validated through Monte-Carlo simulations. Evaluation results show a worstcase reliability of 98.3% over the commercial temperature range of 0C to 85C and 10% fluctuations in supply voltage. In addition, the 128-bit PUF array consumes only 1.33 ?W at 1 Mb/s, which corresponds to 10.3 fJ/bit, being the most energy-efficient design to date.},
bibtype = {article},
author = {Tao, S. and Dubrova, E.},
journal = {Electronics Letters},
number = {10}
}
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