Low-noise tunable band-pass filter for ISM 2.4 GHZ bluetooth transceiver in ±0.7V 32 nm CNFET technology. Tripathi, S., Ansari, M., & Joshi, A. Volume 468 , 2017.
doi  abstract   bibtex   
© Springer Science+Business Media Singapore 2017. This paper presents a CNFET-based low-noise band-pass filter for application in 2.4 GHz Bluetooth transceivers. The proposed circuit exploits the ultrawide voltage and current bandwidths of CNFET-based analog building blocks as compared to their CMOS counterparts. Tuning of the center frequency is demonstrated via variation of a grounded resistor. SPICE simulations show that the CNFET-based building block consumes only 15% power as compared to its CMOS equivalent. Noise analysis and Monte Carlo analysis also demonstrate the high performance characteristics of the proposed circuit.
@book{
 title = {Low-noise tunable band-pass filter for ISM 2.4 GHZ bluetooth transceiver in ±0.7V 32 nm CNFET technology},
 type = {book},
 year = {2017},
 source = {Advances in Intelligent Systems and Computing},
 keywords = {CMOS Scaling,Carbon Nanotube Field Effect Transistor (CNFET),Current mode (CM),Dual-output inverting current conveyor (DOICC-II),Voltage mode (VM)},
 volume = {468},
 id = {b053af21-f6db-31ac-8126-4e5b04b88a8f},
 created = {2018-09-06T11:22:40.077Z},
 file_attached = {false},
 profile_id = {11ae403c-c558-3358-87f9-dadc957bb57d},
 last_modified = {2018-09-06T11:22:40.077Z},
 read = {false},
 starred = {false},
 authored = {true},
 confirmed = {false},
 hidden = {false},
 private_publication = {false},
 abstract = {© Springer Science+Business Media Singapore 2017. This paper presents a CNFET-based low-noise band-pass filter for application in 2.4 GHz Bluetooth transceivers. The proposed circuit exploits the ultrawide voltage and current bandwidths of CNFET-based analog building blocks as compared to their CMOS counterparts. Tuning of the center frequency is demonstrated via variation of a grounded resistor. SPICE simulations show that the CNFET-based building block consumes only 15% power as compared to its CMOS equivalent. Noise analysis and Monte Carlo analysis also demonstrate the high performance characteristics of the proposed circuit.},
 bibtype = {book},
 author = {Tripathi, S.K. and Ansari, M.S. and Joshi, A.M.},
 doi = {10.1007/978-981-10-1675-2_43}
}

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