The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor. Tsoutsouras, V., Kaparounakis, O., Bilgin, B. A., Samarakoon, C., Meech, J. T., Heck, J., & Stanley-Marbell, P. In MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pages 1254–1269, 2021. ACM.
Paper doi bibtex @inproceedings{DBLP:conf/micro/TsoutsourasKBSM21,
author = {Vasileios Tsoutsouras and
Orestis Kaparounakis and
Bilgesu Arif Bilgin and
Chatura Samarakoon and
James Timothy Meech and
Jan Heck and
Phillip Stanley{-}Marbell},
title = {The Laplace Microarchitecture for Tracking Data Uncertainty and Its
Implementation in a {RISC-V} Processor},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {1254--1269},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480131},
doi = {10.1145/3466752.3480131},
timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/TsoutsourasKBSM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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{"_id":"bBS7n4Ab3foiasfvD","bibbaseid":"tsoutsouras-kaparounakis-bilgin-samarakoon-meech-heck-stanleymarbell-thelaplacemicroarchitecturefortrackingdatauncertaintyanditsimplementationinariscvprocessor-2021","author_short":["Tsoutsouras, V.","Kaparounakis, O.","Bilgin, B. A.","Samarakoon, C.","Meech, J. T.","Heck, J.","Stanley-Marbell, P."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Vasileios"],"propositions":[],"lastnames":["Tsoutsouras"],"suffixes":[]},{"firstnames":["Orestis"],"propositions":[],"lastnames":["Kaparounakis"],"suffixes":[]},{"firstnames":["Bilgesu","Arif"],"propositions":[],"lastnames":["Bilgin"],"suffixes":[]},{"firstnames":["Chatura"],"propositions":[],"lastnames":["Samarakoon"],"suffixes":[]},{"firstnames":["James","Timothy"],"propositions":[],"lastnames":["Meech"],"suffixes":[]},{"firstnames":["Jan"],"propositions":[],"lastnames":["Heck"],"suffixes":[]},{"firstnames":["Phillip"],"propositions":[],"lastnames":["Stanley-Marbell"],"suffixes":[]}],"title":"The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor","booktitle":"MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021","pages":"1254–1269","publisher":"ACM","year":"2021","url":"https://doi.org/10.1145/3466752.3480131","doi":"10.1145/3466752.3480131","timestamp":"Thu, 21 Mar 2024 00:00:00 +0100","biburl":"https://dblp.org/rec/conf/micro/TsoutsourasKBSM21.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/micro/TsoutsourasKBSM21,\n author = {Vasileios Tsoutsouras and\n Orestis Kaparounakis and\n Bilgesu Arif Bilgin and\n Chatura Samarakoon and\n James Timothy Meech and\n Jan Heck and\n Phillip Stanley{-}Marbell},\n title = {The Laplace Microarchitecture for Tracking Data Uncertainty and Its\n Implementation in a {RISC-V} Processor},\n booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,\n Virtual Event, Greece, October 18-22, 2021},\n pages = {1254--1269},\n publisher = {{ACM}},\n year = {2021},\n url = {https://doi.org/10.1145/3466752.3480131},\n doi = {10.1145/3466752.3480131},\n timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/micro/TsoutsourasKBSM21.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Tsoutsouras, V.","Kaparounakis, O.","Bilgin, B. A.","Samarakoon, C.","Meech, J. T.","Heck, J.","Stanley-Marbell, P."],"key":"DBLP:conf/micro/TsoutsourasKBSM21","id":"DBLP:conf/micro/TsoutsourasKBSM21","bibbaseid":"tsoutsouras-kaparounakis-bilgin-samarakoon-meech-heck-stanleymarbell-thelaplacemicroarchitecturefortrackingdatauncertaintyanditsimplementationinariscvprocessor-2021","role":"author","urls":{"Paper":"https://doi.org/10.1145/3466752.3480131"},"metadata":{"authorlinks":{}}},"bibtype":"inproceedings","biburl":"https://dblp.org/pid/72/4861.bib","dataSources":["GNJY3iErmwnvjpX6r"],"keywords":[],"search_terms":["laplace","microarchitecture","tracking","data","uncertainty","implementation","risc","processor","tsoutsouras","kaparounakis","bilgin","samarakoon","meech","heck","stanley-marbell"],"title":"The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor","year":2021}