The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor. Tsoutsouras, V., Kaparounakis, O., Bilgin, B. A., Samarakoon, C., Meech, J. T., Heck, J., & Stanley-Marbell, P. In MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pages 1254–1269, 2021. ACM.
The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/micro/TsoutsourasKBSM21,
  author       = {Vasileios Tsoutsouras and
                  Orestis Kaparounakis and
                  Bilgesu Arif Bilgin and
                  Chatura Samarakoon and
                  James Timothy Meech and
                  Jan Heck and
                  Phillip Stanley{-}Marbell},
  title        = {The Laplace Microarchitecture for Tracking Data Uncertainty and Its
                  Implementation in a {RISC-V} Processor},
  booktitle    = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  Virtual Event, Greece, October 18-22, 2021},
  pages        = {1254--1269},
  publisher    = {{ACM}},
  year         = {2021},
  url          = {https://doi.org/10.1145/3466752.3480131},
  doi          = {10.1145/3466752.3480131},
  timestamp    = {Thu, 21 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/TsoutsourasKBSM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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