Factored Radix-8 Systolic Array for Tensor Processing. Ullah, I., Inayat, K., Yang, J., & Chung, J. In 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020, pages 1–6, 2020. IEEE.
Factored Radix-8 Systolic Array for Tensor Processing [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/dac/UllahIYC20,
  author    = {Inayat Ullah and
               Kashif Inayat and
               Joon{-}Sung Yang and
               Jaeyong Chung},
  title     = {Factored Radix-8 Systolic Array for Tensor Processing},
  booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
               CA, USA, July 20-24, 2020},
  pages     = {1--6},
  publisher = {{IEEE}},
  year      = {2020},
  url       = {https://doi.org/10.1109/DAC18072.2020.9218585},
  doi       = {10.1109/DAC18072.2020.9218585},
  timestamp = {Wed, 14 Oct 2020 10:56:17 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/UllahIYC20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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