Framework for economical error recovery in embedded cores. Upasani, G., Vera, X., & González, A. In IOLTS, pages 146-153, 2014. IEEE.
Framework for economical error recovery in embedded cores. [link]Link  Framework for economical error recovery in embedded cores. [link]Paper  bibtex   
@inproceedings{conf/iolts/UpasaniVG14,
  added-at = {2016-01-15T00:00:00.000+0100},
  author = {Upasani, Gaurang and Vera, Xavier and González, Antonio},
  biburl = {http://www.bibsonomy.org/bibtex/23fa31e2999d6ab5d7039473c33bd1c1d/dblp},
  booktitle = {IOLTS},
  crossref = {conf/iolts/2014},
  ee = {http://dx.doi.org/10.1109/IOLTS.2014.6873687},
  interhash = {533ad829fed2febd3528d87c26fb1a7e},
  intrahash = {3fa31e2999d6ab5d7039473c33bd1c1d},
  keywords = {dblp},
  pages = {146-153},
  publisher = {IEEE},
  timestamp = {2016-01-16T11:56:13.000+0100},
  title = {Framework for economical error recovery in embedded cores.},
  url = {http://dblp.uni-trier.de/db/conf/iolts/iolts2014.html#UpasaniVG14},
  year = 2014
}

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