Sorting on PRAMs with Reconfigurable Buses. Vaidyanathan, R. Inf. Process. Lett., 42(4):203–208, 1992.
Sorting on PRAMs with Reconfigurable Buses [link]Paper  doi  bibtex   
@article{DBLP:journals/ipl/Vaidyanathan92,
  author    = {Ramachandran Vaidyanathan},
  title     = {Sorting on PRAMs with Reconfigurable Buses},
  journal   = {Inf. Process. Lett.},
  volume    = {42},
  number    = {4},
  pages     = {203--208},
  year      = {1992},
  url       = {https://doi.org/10.1016/0020-0190(92)90240-V},
  doi       = {10.1016/0020-0190(92)90240-V},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/ipl/Vaidyanathan92.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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