@inproceedings{DBLP:conf/dsd/VeredasC18,
  author       = {Francisco{-}Javier Veredas and
                  Enrique J. Carmona},
  editor       = {Martin Novotn{\'{y}} and
                  Nikos Konofaos and
                  Amund Skavhaug},
  title        = {{FPGA} Placement Improvement Using a Genetic Algorithm and the Routing
                  Algorithm as a Cost Function},
  booktitle    = {21st Euromicro Conference on Digital System Design, {DSD} 2018, Prague,
                  Czech Republic, August 29-31, 2018},
  pages        = {70--76},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/DSD.2018.00026},
  doi          = {10.1109/DSD.2018.00026},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/VeredasC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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